The present invention generally relates to semiconductor packages, and more particularly to predicting the at temperature warpage of the semiconductor packages.
A semiconductor package is an electronic package with an integrated circuit or die mounted on a substrate with a lid which has external electronic connections. A semiconductor package may warp within a predetermined temperature range due to the difference or mismatch in the coefficient of thermal expansion (CTE) of the integrated circuit and the substrate. A semiconductor package may also be referred to as a semiconductor chip package, a module, a multi-chip module, a multi-chip package, a chip, an electronic chip, a flip chip, a flip chip package, a stacked chip, an integrated circuit package, a semiconductor device assembly, an encapsulation and other names.